PGY-I3C Protocol Trigger & Decode Software
The PGY-I3C Protocol Trigger & Decode Software from Prodigy Technovations is an advanced protocol analysis and debug solution designed for engineers working with I3C-based systems. Running directly inside supported Tektronix oscilloscopes, the software provides real-time protocol-aware triggering, deep packet decoding, and waveform correlation to simplify debugging and accelerate development of next-generation embedded and sensor interfaces.
Advanced I3C Protocol Analysis
PGY-I3C enables engineers to analyze I3C traffic using either live oscilloscope acquisitions or previously stored waveform data. The software supports decoding of multiple I3C frame formats, including:
- SDR
- DDR
- TSL
- TSP
- Standard I3C frame structures
The platform is designed to help engineers quickly identify protocol-level issues and validate communication between host processors and connected devices in mobile, automotive, and embedded applications.
Real-Time Protocol-Aware Triggering
The software utilizes powerful hardware-based real-time triggering capabilities available on Tektronix oscilloscopes. Engineers can trigger directly on:
- SDR Broadcast commands
- SDR Direct commands
- SDR Message frames
- Specific packet content and protocol events
This enables precise capture of difficult-to-find protocol anomalies and intermittent communication issues.
The flexible trigger engine also allows combinations of different frame types and commands, making it ideal for complex I3C validation and debug scenarios.
Deep Waveform and Packet Correlation
PGY-I3C links decoded protocol packets directly to the oscilloscope waveform display, allowing engineers to move seamlessly between packet-level analysis and physical layer behavior.
The software provides:
- Detailed protocol frame visualization
- Bit-level packet decoding
- Protocol activity tables
- Bus diagram overlays
- Correlation between analog waveform and protocol data
This tight integration between waveform and protocol analysis dramatically improves debug efficiency and reduces investigation time.
Powerful Debug and Analysis Environment
The software offers a comprehensive debug environment with:
- Interactive protocol view
- Search and filter capabilities
- Long memory acquisition analysis
- Error detection based on I3C specification
- Detailed waveform inspection
Users can quickly search for specific protocol events, isolate errors, and focus only on relevant traffic within large captures.
Long Acquisition Memory Support
PGY-I3C supports protocol analysis on acquisition memory sizes up to 125 MB, enabling engineers to decode long protocol sessions and capture rare or intermittent events that may not appear in shorter acquisitions.
This capability is especially valuable when debugging complex embedded systems or validating long-duration communication behavior.
Flexible Operating Modes
The software supports multiple acquisition and analysis modes, including:
- Single acquisition mode
- Repetitive acquisition mode
- Offline “No Acquisition” mode for analyzing previously captured waveforms
This flexibility allows engineers to work efficiently during both live debug sessions and offline post-analysis.
Reporting and Documentatio
PGY-I3C includes built-in reporting and export capabilities to support documentation and compliance workflows:
- Export decoded protocol data to CSV and TXT formats
- Generate PDF reports with waveform screenshots
- Add custom comments, headers, and test attributes to reports
These features simplify collaboration between engineering teams and help maintain structured validation records.
Supported Oscilloscopes
The software is designed for Tektronix oscilloscope platforms including:
- DPO/MSO5000 series
- DPO7000 series
- DPO/MSO/DSA70000 series
The license is locked to the oscilloscope platform for streamlined deployment in development and validation laboratories.
Ideal Applications
PGY-I3C Protocol Trigger & Decode Software is ideal for:
- Embedded systems development
- Sensor interface validation
- Mobile and automotive electronics
- Semiconductor validation labs
- I3C interoperability testing
- High-speed serial bus debugging
The solution helps engineering teams accelerate debug cycles, improve visibility into I3C communication, and reduce development risk in complex embedded designs.
