The Prodigy SPMI Protocol Analyzer and Exerciser (PGY-SPMI-EX-PD) tests the System Power Management Interface, the MIPI two-wire bus that connects a SoC’s power controller to one or more PMICs. It acts as master or slave, generates SPMI traffic with timing variations and error injection, and decodes SPMI 1.0 and 2.0 packets at bus speeds from 32 kHz to 26 MHz, all at the same time. Pertech is the authorized Prodigy distributor.
SPMI analyzer highlights
- Supports SPMI 1.0 and 2.0, sole-master and multi-master networks, Request Capable Slaves and bus arbitration
- Configurable as 1 master and 2 slaves, generating custom SPMI traffic from the GUI or scripts
- SCLK from 32 kHz to 26 MHz, drive levels of 1.2 or 1.8 V, duty cycle of 25, 50 or 75 percent
- SCLK and SDATA delays at 4 ns resolution, and adjustable delay between messages
- Error injection: data, command and address parity, ACK and NACK errors, and Skip SSC in sole-master systems
- Generates traffic and decodes the bus simultaneously, with continuous streaming to the host disk
- Timing diagram, protocol listing and bus diagram views with error analysis
- Python and C++ API, plus optional PICS (Protocol Implementation Compliance Statement) scripts
Where the SPMI analyzer earns its keep
- PMIC bring-up and validation against the SPMI 1.0 and 2.0 specifications
- SoC power controller firmware development, with the exerciser standing in for a missing PMIC or master
- Testing arbitration and Request Capable Slave behavior on multi-master buses
- Checking that devices detect and recover from parity and acknowledge errors
Key Specifications
| Spec | Value |
|---|---|
| Model | PGY-SPMI-EX-PD |
| Specification | SPMI 1.0 and 2.0 |
| Configuration | 1 master + 2 slaves |
| SCLK frequency | 32 kHz to 26 MHz |
| Drive level | 1.2 or 1.8 V |
| Duty cycle | 25, 50 or 75% |
| Timing resolution | 4 ns (SCLK and SDATA delay) |
| Error injection | Data, command and address parity; ACK/NACK; Skip SSC (sole master) |
| Triggers | User-defined SPMI packet after SSC |
| Capture | Continuous streaming to host |
| API | Python and C++ |
| Host connection | USB 2.0/3.0 |
Frequently asked questions
What is SPMI used for?
SPMI (System Power Management Interface) is a MIPI standard: a two-wire synchronous, bidirectional serial bus that links the power controller in a SoC to one or more PMICs that regulate its supply voltages.
Does the analyzer support SPMI 2.0?
Yes. It supports both SPMI 1.0 and SPMI 2.0, in sole-master and multi-master networks, and the unit can be upgraded as the specification evolves.
Which errors can it inject?
As master it injects data, command and address parity errors and, in sole-master systems, Skip SSC errors; as slave it injects data parity errors. It also reports ACK and NACK errors it sees on the bus.
Can SPMI tests be automated?
Yes. Traffic can be scripted, including multiple frames at different data speeds, and the instrument has a Python and C++ API. Optional PICS scripts support compliance testing.
Where can I buy the Prodigy SPMI analyzer in Israel?
Pertech is the authorized Prodigy distributor. Prodigy offers evaluation units, free online technical support and free software updates. Contact Pertech for a quote or a demo.
Related Prodigy products at Pertech
- RFFE Protocol Analyzer and Exerciser
- I3C Protocol Exerciser and Analyzer
- PMBus Protocol Analyzer and Exerciser
- Prodigy protocol analyzers at Pertech
Validating a PMIC or power controller? Contact Pertech for a quote, a demo or help choosing the right tool.
